我的芯片型号是hc32f460jeua,使用的库为HC32F460_DDL_Rev3.1.0，keil包为HDSC.HC32F460.1.0.10。
/**
* @brief clock initialize.
* Set board system clock to MPLL@200MHz
* @param None
* @retval None
*/
void systemClockInit(void){
stc_clock_xtal_init_t stcXtalInit;
stc_clock_pll_init_t stcMpllInit;
LL_PERIPH_WE(LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_GPIO | LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM);
GPIO_AnalogCmd(BSP_XTAL_PORT, BSP_XTAL_IN_PIN | BSP_XTAL_OUT_PIN, ENABLE);
(void)CLK_XtalStructInit(&stcXtalInit);
(void)CLK_PLLStructInit(&stcMpllInit);
/* Set bus clk div. */
CLK_SetClockDiv(CLK_BUS_CLK_ALL, (CLK_HCLK_DIV1 | CLK_EXCLK_DIV2 | CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | \
CLK_PCLK2_DIV4 | CLK_PCLK3_DIV4 | CLK_PCLK4_DIV2));
/* Config Xtal and enable Xtal */
stcXtalInit.u8Mode = CLK_XTAL_MD_OSC;
stcXtalInit.u8Drv = CLK_XTAL_DRV_ULOW;
stcXtalInit.u8State = CLK_XTAL_ON;
stcXtalInit.u8StableTime = CLK_XTAL_STB_2MS;
(void)CLK_XtalInit(&stcXtalInit);
/* MPLL config (XTAL / pllmDiv * plln / PllpDiv = 200M). */
stcMpllInit.PLLCFGR = 0UL;
stcMpllInit.PLLCFGR_f.PLLM = 1UL - 1UL;
stcMpllInit.PLLCFGR_f.PLLN = 50UL - 1UL;
stcMpllInit.PLLCFGR_f.PLLP = 2UL - 1UL;
stcMpllInit.PLLCFGR_f.PLLQ = 2UL - 1UL;
stcMpllInit.PLLCFGR_f.PLLR = 2UL - 1UL;
stcMpllInit.u8PLLState = CLK_PLL_ON;
stcMpllInit.PLLCFGR_f.PLLSRC = CLK_PLL_SRC_XTAL;
(void)CLK_PLLInit(&stcMpllInit);
/* Wait MPLL ready. */
while (SET != CLK_GetStableStatus(CLK_STB_FLAG_PLL)) {
;
}
/* sram init include read/write wait cycle setting */
SRAM_SetWaitCycle(SRAM_SRAMH, SRAM_WAIT_CYCLE0, SRAM_WAIT_CYCLE0);
SRAM_SetWaitCycle((SRAM_SRAM12 | SRAM_SRAM3 | SRAM_SRAMR), SRAM_WAIT_CYCLE1, SRAM_WAIT_CYCLE1);
/* flash read wait cycle setting */
(void)EFM_SetWaitCycle(EFM_WAIT_CYCLE5);
/* 3 cycles for 126MHz ~ 200MHz */
GPIO_SetReadWaitCycle(GPIO_RD_WAIT3);
/* Switch driver ability */
(void)PWC_HighSpeedToHighPerformance();
/* Switch system clock source to MPLL. */
CLK_SetSysClockSrc(CLK_SYSCLK_SRC_PLL);
SystemCoreClockUpdate();
}
/**
* @brief Setup the microcontroller system. Initialize the System and update
* the SystemCoreClock variable.
* @param None
* @retval None
*/
void SystemInit(void)
{
/* FPU settings */
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 20) | (3UL << 22)); /* set CP10 and CP11 Full Access */
#endif
systemClockInit();
#if defined (ROM_EXT_QSPI)
SystemInit_QspiMem();
#endif /* ROM_EXT_QSPI */
/* Configure the Vector Table relocation */
SCB->VTOR = VECT_TAB_OFFSET; /* Vector Table Relocation */
}