基于nanoDAP 修改了IO 配置，下载和串口测试没问题
以下是修改部分
io_config.h
//Connected LED
define CONNECTED_LED_PORT GPIOC
define CONNECTED_LED_PIN GPIO_PIN_14
define CONNECTED_LED_PIN_Bit 14
//When bootloader, disable the target port(not used)
define POWER_EN_PIN_PORT GPIOC
define POWER_EN_PIN GPIO_PIN_13
define POWER_EN_Bit 13
// nRESET OUT Pin
define nRESET_PIN_PORT GPIOB
define nRESET_PIN GPIO_PIN_6
define nRESET_PIN_Bit 6
//SWD
define SWCLK_TCK_PIN_PORT GPIOB
define SWCLK_TCK_PIN GPIO_PIN_13
define SWCLK_TCK_PIN_Bit 13
define SWDIO_OUT_PIN_PORT GPIOB
define SWDIO_OUT_PIN GPIO_PIN_14
define SWDIO_OUT_PIN_Bit 14
define SWDIO_IN_PIN_PORT GPIOB
define SWDIO_IN_PIN GPIO_PIN_12
define SWDIO_IN_PIN_Bit 12
uart.c
原来默认为USART2
// For usart
define CDC_UART USART3
define CDC_UART_ENABLE() __HAL_RCC_USART3_CLK_ENABLE()
define CDC_UART_DISABLE() __HAL_RCC_USART3_CLK_DISABLE()
define CDC_UART_IRQn USART3_IRQn
define CDC_UART_IRQn_Handler USART3_IRQHandler
define UART_PINS_PORT_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
define UART_PINS_PORT_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
define UART_TX_PORT GPIOB
define UART_TX_PIN GPIO_PIN_10
define UART_RX_PORT GPIOB
define UART_RX_PIN GPIO_PIN_11
define UART_CTS_PORT GPIOA
define UART_CTS_PIN GPIO_PIN_0
define UART_RTS_PORT GPIOA
define UART_RTS_PIN GPIO_PIN_1
同时屏蔽了uart_initialize 中的CTS和RTS的管脚初始化配置
下图为stlink V2的原理图，只加了关键IO
